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  •   ADSP-21990BSTZ2 Datasheet
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  • ADSP  -  Series DataSheet
    ADSP-21990BSTZ2  -  Mixed-Signal DSP Controller,High-Performance Mixed-Signal DSP, 160 MHz, 4K Words Program Memory RAM   -  Analog Devices  -  DSP Systems


    FEATURES
    ADSP-2199x, 16-bit, fixed-point DSP core with up to 160
    MIPS sustained performance
    8K words of on-chip RAM, configured as 4K words on-chip,
    24-bit program RAM and 4K words on-chip, 16-bit data RAM
    External memory interface
    Dedicated memory DMA controller for data/instruction
    transfer between internal/external memory
    Programmable PLL and flexible clock generation circuitry
    enables full speed operation from low speed input clocks
    IEEE JTAG Standard 1149.1 test access port supports on-chip
    emulation and system debugging
    8-channel, 14-bit analog-to-digital converter system, with up
    to 20 MSPS sampling rate (at 160 MHz core clock rate)
    3-phase, 16-bit, center-based PWM generation unit with 12.5
    ns resolution at 160 MHz core clock (CCLK) rate
    Dedicated 32-bit encoder interface unit with companion
    encoder event timer
    Dual 16-bit auxiliary PWM outputs
    16 general-purpose flag I/O pins
    3 programmable 32-bit interval timers
    SPI communications port with master or slave operation
    Synchronous serial communications port (SPORT) capable of
    software UART emulation
    Integrated watchdog timer
    Dedicated peripheral interrupt controller with software
    priority control
    Multiple boot modes
    Precision 1.0 V voltage reference
    Integrated power-on-reset (POR) generator
    Flexible power management with selectable power-down and idle modes
    2.5 V internal operation with 3.3 V I/O
    Operating temperature range of –40C to +85C
    196-ball CSP_BGA and 176-lead LQFP package

    GENERAL DESCRIPTION
    The ADSP-21990 is a mixed-signal DSP controller based on the ADSP-2199x DSP core, suitable for a variety of high performance industrial motor control and signal processing applications that require the combination of a high performance DSP and the mixed-signal integration of embedded control peripherals such as analog-to-digital conversion. Target applications include: industrial motor drives, uninterruptible power supplies, optical networking control, data acquisition systems, test and measurement systems, and portable instrumentation.
    The ADSP-21990 integrates the fixed-point ADSP-2199x family-based architecture with a serial port, an SPI-compatible port, a DMA controller, three programmable timers, general-purpose programmable flag pins, extensive interrupt capabilities, onchip program and data memory spaces, and a complete set of embedded control peripherals that permits fast motor control and signal processing in a highly integrated environment.
    The ADSP-21990 architecture is code compatible with previous ADSP-217xx based ADMCxxx products. Although the architectures are compatible, the ADSP-21990, with ADSP-2199x architecture, has a number of enhancements over earlier architectures.
    The enhancements to computational units, data address generators, and program sequencer make the ADSP-21990 more flexible and easier to program than the previous
    ADSP-21xx embedded DSPs.
    Indirect addressing options provide addressing flexibility—premodify with no update, pre- and post-modify by an immediate 8-bit, twos complement value and base address registers for easier implementation of circular buffering.
    The ADSP-21990 integrates 8K words of on-chip memory configured as 4K words (24-bit) of program RAM, and 4K words (16-bit) of data RAM.
    Fabricated in a high speed, low power, CMOS process, the ADSP-21990 operates with a 6.25 ns instruction cycle time for a 160 MHz CCLK and with a 6.67 ns instruction cycle time for a 150 MHz CCLK.
    The flexible architecture and comprehensive instruction set of the ADSP-21990 support multiple operations in parallel. For example, in one processor cycle, the ADSP-21990 can:
    • Generate an address for the next instruction fetch.
    • Fetch the next instruction.
    • Perform one or two data moves.
    • Update one or two data address pointers.
    • Perform a computational operation.
    These operations take place while the processor continues to:
    • Receive and transmit data through the serial port.
    • Receive or transmit data over the SPI port.
    • Access external memory through the external memory interface.
    • Decrement the timers.
    • Operate the embedded control peripherals (ADC, PWM, EIU, etc.).



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