Features
• ZERO POWER E2CMOS TECHNOLOGY
— 100μA Standby Current
— Input Transition Detection on GAL16V8Z
— Dedicated Power-down Pin on GAL16V8ZD
— Input and Output Latching During Power Down
• HIGH PERFORMANCE E2CMOS TECHNOLOGY
— 12 ns Maximum Propagation Delay
— Fmax = 83.3 MHz
— 8 ns Maximum from Clock Input to Data Output
— TTL Compatible 16 mA Output Drive
— UltraMOS® Advanced CMOS Technology
• E2 CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
— Programmable Output Polarity
— Architecturally Similar to Standard GAL16V8
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
— 100% Functional Testability
• APPLICATIONS INCLUDE:
— Battery Powered Systems
— DMA Control
— State Machine Control
— High Speed Graphics Processing
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
Description
The GAL16V8Z and GAL16V8ZD, at 100 μA standby current and 12ns propagation delay provides the highest speed and lowest power combination PLD available in the market. The GAL16V8Z/ZD is manufactured using Lattice Semiconductor's advanced zero power E2CMOS process, which combines CMOS with Electrically Erasable (E2) floating gate technology.
The GAL16V8Z uses Input Transition Detection (ITD) to put the device in standby mode and is capable of emulating the full functionality of the standard GAL16V8. The GAL16V8ZD utilizes a dedicated power-down pin (DPP) to put the device in standby mode.
It has 15 inputs available to the AND array.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.
Click to view :
GAL16V8ZD-12QP1.pdf
