n LOW POWER CONSUMPTION n WIDE COMMON-MODE (UP TO VCC +) AND DIFFERENTIAL VOLTAGE RANGE n LOW INPUT BIAS AND OFFSET CURRENT n OUTPUT SHORT-CIRCUIT PROTECTION n HIGH INPUT IMPEDANCE J–FET INPUT STAGE n INTERNAL FREQUENCY COMPENSATION n LATCH UP FREE OPERATION n HIGH SLEW RATE : 16V/ms (typ) DESCRIPTION These circuits are high speed J–FET input quad operational amplifiers incorporating well matched, high voltage J–FET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient.
